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TFBS6712
Vishay Semiconductors
Low Profile Fast Infrared Transceiver (FIR, 4 Mbit/s) for IrDA(R) Applications with Low voltage Logic (1.8 V)
Description
The TFBS6712 is the smallest FIR transceiver available. It is a low profile and low-power IrDA transceiver. Compliant to IrDA's Physical Layer specification, the TFBS6712 supports data transmission rates from 9.6 kbit/s to 4 Mbit/s with a typical link distance of 50 cm. It also enables mobile phones and PDAs to function as universal remote controls for televisions, DVDs and other home appliances. The TFBS6712 emitter covers a range of 6.5 meters with common remote control receivers. Integrated within the transceiver module is a PIN photodiode, an infrared emitter, and a low-power control IC. The TFBS6712 can be completely shutdown, achieving very low power consumption. This type is adapted to
20208
work with a low logic I/O voltage of 1.8 V. For operation with VCC as logic voltage base TFBS6711 is available with otherwise same performance.
Features
* * * * * * * * * * * * Lowest profile: 1.9 mm Smallest footprint: 6.0 mm x 3.05 mm Surface mount package e4 IrDA transmit distance: 50 cm typical Best Remote Control distance: 6.5 m on-axis Fast data rates: from 9.6 kbit/s to 4 Mbit/s Low shutdown current: 0.01 A Operating Voltage: 2.4 V to 3.6 V Reduced pin count: 6 pins I/O voltage equal to the supply voltage Pin compatibility: TFBS4711 and TFBS5711 Integrated EMI Protection - no external shield required IEC 60825-1 Class 1, Eye Safe Qualified for lead-free and Sn/Pb processing Compliant to IrDA Physical Layer Specification Split power supply, transmitter and receiver can be operated from two power supplies with relaxed requirements saving costs, US patent No. 6,157,476 * Lead (Pb)-free device * Qualified for lead (Pb)-free and Sn/Pb processing (MSL4) * Device in accordance with RoHS 2002/95/EC and WEEE 2002/96/EC * * * *
Applications
* High-speed data transfer using infrared wireless communication * Mobile phones * Camera phones * * * * PDAs MP3 Players Digital Cameras IrDA Adapters or Dongles
Package Options Ordering Information
Part Number TFBS6712-TR1 TFBS6712-TR3 Qty/Reel or Tube 1000 pcs 2500 pcs Description and Remarks Oriented in carrier tape for side view surface mounting Oriented in carrier tape for side view surface mounting
Note: A version oriented in the carrier tape for top view mounting is available on request
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Document Number 84674 Rev. 1.2, 21-Feb-07
TFBS6712
Vishay Semiconductors Functional Block Diagram
VCC1 Tri-State Driver Amplifier Comparator
RXD
VCC2 SD
Logic &
Control
Controlled Driver
TXD
GND
19298
Figure 1. Functional Block Diagramm
Pin Description
Pin Number 1 Function VCC2, IRED Anode Description IRED anode to be externally connected to VCC2. For higher voltages as 3.6 V an external resistor might be necessary for reducing the internal power dissipation. See derating curves. This pin is allowed to be supplied from an uncontrolled power supply separated from the controlled VCC1 - supply Transmitter Data Input, adapted to 1.8-V logic Received Data Output, push-pull CMOS driver output capable of driving a standard CMOS load. No external pull-up or pull-down resistor is required. Adapted to low i/O voltage 1.8-V logic. Floating with a weak pull-up of 500 k (typ.) in shutdown mode. The RXD output echos the TXD input during transmission. Shutdown, also used for dynamic mode switching Supply voltage Ground I O HIGH LOW I/O Active
2 3
TXD RXD
4 5 6
SD VCC1 GND
I
HIGH
TFBS6712 Weight: 50 mg
PIN 1
19428
Figure 2. Pinning
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TFBS6712
Vishay Semiconductors Absolute Maximum Ratings
Reference point Pin, GND unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Supply voltage range, transceiver Supply voltage range, transmitter Input currents Output sinking current Power dissipation Junction temperature Ambient temperature range (operating) Storage temperature range Soldering temperature Average output current Repetitive pulse output current IRED anode voltage Voltage at all inputs and outputs Vin > VCC1 is allowed Virtual source size Method: (1-1/e) encircled energy < 90 s, ton < 20 % IIRED (DC) IIRED (RP) VIREDA Vin d - 0.5 - 0.5 1.5 internal limitation to class 1 500 PD TJ Tamb Tstg - 25 - 25 Test Conditions 0 V < VCC2 < 6 V 0 V < VCC1 < 6 V For all pins, except IRED anode pin Symbol VCC1 VCC2 Min - 0.5 - 0.5 Typ. Max 6 6.5 10 25 500 125 + 85 + 85 260 125 600 6.5 5.5 Unit V V mA mA mW C C C C mA mA V V mm mW/sr
Maximum intensity for Class 1 operation of IEC60825-1 or EN60825-1, edition Jan. 2001 IrDA(R) specified maximum limit Due to the internal limitation measures the device is a "class 1" device. It will not exceed the IrDA(R) intensity limit of 500 mW/sr
Definitions:
In the Vishay transceiver data sheets the following nomenclature is used for defining the IrDA operating modes: SIR: 2.4 kbit/s to 115.2 kbit/s, equivalent to the basic serial infrared standard with the physical layer version IrPhY 1.0 MIR: 576 kbit/s to 1152 kbit/s FIR: 4 Mbit/s VFIR: 16 Mbit/s IrDA(R), the Infrared Data Association, implemented MIR and FIR with IrPHY 1.1, followed by IrPhY 1.2, adding the SIR Low Power Standard. IrPhY 1.3 extended the Low Power Option to MIR and FIR and VFIR was added with IrPhY 1.4. A new version of the standard in any case obsoletes the former version.
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Document Number 84674 Rev. 1.2, 21-Feb-07
TFBS6712
Vishay Semiconductors Electrical Characteristics
Tamb = 25 C, VCC = 2.4 V to 3.6 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Transceiver Supply voltage range Dynamic supply current VCC 2.4 3.6 V Receive mode only. In transmit mode, add additional 85 mA (typ) for IRED current. Add RXD output current depending on RXD load. SD = Low, SIR mode SD = Low, MIR/FIR mode Shutdown supply current SD = High T = 25 C, not ambient light sensitive, detector is disabled in shutdown mode SD = High T = 85 C, not ambient light sensitive IOL = 1 mA CLOAD = 15 pF IOH = - 250 A CLOAD = 15 pF ICC ICC ISD 1.7 1.9 3 3.3 1 mA mA A Test Conditions Symbol Min Typ. Max Unit
Shutdown supply current
ISD
5
A
Operating temperature range Output voltage "Low" Output voltage "High" Internal RXD pull-up Input voltage "Low" (TXD, SD) Input voltage "High" (TXD, SD) Input leakage current (TXD, SD)*) Vin > 1.6 V Input capacitance (TXD, SD)
*) The
TA VOL VOH RRXD VIL VIH IICH CI
- 25
+ 85 0.4
C V V k V V A pF
1.6 400 - 0.5 1.5 -1
1.8 500 1.8 0.05
2 600 0.5 2.1 +1 5
typical threshold level is 0.5 x VCC (at VCC = 3V). It is recommended to use the specified min/max values to avoid increased operating/shutdown currents.
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TFBS6712
Vishay Semiconductors Optoelectronic Characteristics
Tamb = 25 C, VCC = 2.4 V to 3.6 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Receiver Minimum irradiance Ee in angular range**) Minimum irradiance Ee in angular range MIR mode Minimum irradiance Ee in angular range FIR mode Maximum irradiance Ee in angular range***) No detection receiver Input Irradiance (fluorescent light noise suppression) Rise time of output signal Fall time of output signal RXD pulse width of output signal, 50 %, SIR mode RXD pulse width of output signal, 50 %, MIR mode RXD pulse width of output signal, 50 %, FIR mode RXD pulse width of output signal, 50 %, FIR mode RXD output jitter, leading edge 10 % to 90 %, CL = 15 pF 90 % to 10 %, CL = 15 pF Input pulse length 1.4 s < PWopt < 25 s Input pulse length PWopt = 217 ns, 1.152 Mbit/s Input pulse length PWopt = 125 ns, 4 Mbit/s Input pulse length PWopt = 250 ns, 4 Mbit/s Input irradiance = 150 mW/m2, 4 Mbit/s 1.152 Mbit/s 115.2 kbit/s After completion of shutdown programming sequence Power on delay tL IrDA(R) 9.6 kbit/s to 115.2 kbit/s = 850 nm to 900 nm, Vcc = 2.4 V 1.152 Mbit/s = 850 nm to 900 nm, Vcc = 2.4 V 4 Mbit/s = 850 nm to 900 nm, Vcc = 2.4 V = 850 nm to 900 nm Ee Ee 50 (5) 100 (10) Ee 120 (12) Ee Ee 4 (0.4) tr (RXD) tf (RXD) tPW tPW tPW tPW 10 10 1.4 110 110 225 1.8 250 50 50 2.6 270 140 275 5 (500) 200 (20) 80 (8) mW/m2 (W/cm2) mW/m2 (W/cm2) mW/m2 (W/cm2) kW/m2 (mW/cm2) mW/m2 (W/cm2) ns ns s ns ns ns Test Conditions Symbol Min Typ. Max Unit
20 40 350 500
ns ns ns s
Receiver start up time
Latency*) Note: All timing data measured with 4 Mbit/s are measured using the after starting the preamble.
*)
100
s
FIR transmission header. The data given here are valid 5 s
IrDA latency definition: Receiver Latency Allowance (milliseconds or microseconds) is the maximum time after a node ceases transmitting before the node's receiver recovers its specified sensitivity. During this period and also during the receiver start up time (after power on or shut down) the RXD output may be in an undefined state.
**)
IrDA sensitivity definition: Minimum Irradiance Ee In Angular Range, power per unit area. The receiver must meet the BER specification while the source is operating at the minimum intensity in angular range into the minimum half-angle range at the maximum Link Length
***)
Maximum Irradiance Ee In Angular Range, power per unit area. The optical power delivered to the detector by a source operating at the maximum intensity in angular range at Minimum Link Length must not cause receiver overdrive distortion and possible related link errors. If placed at the Active Output Interface reference plane of the transmitter, the receiver must meet its bit error ratio (BER) specification. For more definitions see the document "Symbols and Terminology" on the Vishay Website (http://www.vishay.com/docs/82512/82512.pdf).
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Document Number 84674 Rev. 1.2, 21-Feb-07
TFBS6712
Vishay Semiconductors Optoelectronic Characteristics, continued
Tamb = 25 C, VCC = 2.4 V to 3.6 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Transmitter IRED operating current, switched current control Output leakage IRED current Output radiant intensity, see figure 3, recommended application circuit Output radiant intensity, see figure 3, recommended application circuit Output radiant intensity See derating curve. For 3.3-V operation no external resistor is needed. VCC = VIRED = 3.3 V, TXD = Low VCC = VIRED = 3.3 V, = 0 TXD = High, SD = Low, R1 = 1 VCC = VIRED = 3.3 V, = 0, 15 TXD = High, SD = Low, R1 = 1 VCC = 3.6 V, = 0, 15 TXD = Low or SD = High (Receiver is inactive as long as SD = High) ID 330 440 600 mA Test Conditions Symbol Min Typ. Max Unit
IIRED Ie
-1 45 115
1 300
A mW/sr
Ie
25
75
300
mW/sr
Ie
0.04
mW/sr
Output radiant intensity, angle of half intensity Peak - emission wavelength Optical rise time, Optical fall time Optical output pulse duration Optical output pulse duration Optical output pulse duration Optical output pulse duration Optical overshoot Input pulse width 217 ns, 1.152 Mbit/s Input pulse width 125 ns, 4 Mbit/s Input pulse width 250 ns, 4 Mbit/s Input pulse width t < 80 s Input pulse width t 80 s
p tropt, tfopt topt topt topt topt topt 880 10 200 116 241 20
24 900 40 217 125 250 t 85 25 230 134 259
nm ns ns ns ns s s %
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TFBS6712
Vishay Semiconductors Recommended Circuit Diagram
Operated at a clean low impedance power supply the TFBS6712 needs no additional external components. However, depending on the entire system design and board layout, additional components may be required (see figure 3). A Tantalum capacitor should be used for C1 while a ceramic capacitor is used for C2. In addition, when connecting the described circuit to the power supply, low impedance wiring should be used. When extended wiring is used the inductance of the power supply can cause dynamically a voltage drop at VCC2. Often some power supplies are not able to follow the fast current rise time. In that case another 4.7 F (type, see tavle under C1) at VCC2 will be helpful. Keep in mind that basic RF-design rules for circuit design should be taken into account. Especially longer signal lines should not be used without termination. See e.g. "The Art of Electronics" Paul Horowitz, Winfield Hill, 1989, Cambridge University Press, ISBN: 0521370957. Table 1. Recommended Application Circuit Components
Component Figure 3. Recommended Application Circuit C1 Recommended Value 4.7 F, 16 V Vishay part#: 293D 475X9 016B 0.1 F, Ceramic Vishay part#: VJ1 206 Y 104 J XXMT 3.3 V supply voltage: no resistor necessary, the internal controller is able to control the current 4.7 , 0.125 W
VCC2 VCC1 GND SD TXD RXD R2 C1
R1 C2
IRED Anode VCC Ground SD TXD RXD
19430
The capacitor C1 is buffering the supply voltage and eliminates the inductance of the power supply line. This one should be a Tantalum or other fast capacitor to guarantee the fast rise time of the IRED current. Vishay transceivers integrate a sensitive receiver and a built-in power driver. The combination of both needs a careful circuit board layout. The use of thin, long, resistive and inductive wiring should be avoided. The inputs (TXD, SD) and the output RXD should be directly (DC) coupled to the I/O circuit. The capacitor C2 combined with the resistor R2 is the low pass filter for smoothing the supply voltage. R2, C1 and C2 are optional and dependent on the quality of the supply voltages VCCx and injected noise. An unstable power supply with dropping voltage during transmission may reduce the sensitivity (and transmission range) of the transceiver. The placement of these parts is critical. It is strongly recommended to position C2 as close as possible to the transceiver power supply pins.
C2
R1 R2
I/O and Software
In the description, already different I/Os are mentioned. Different combinations are tested and the function verified with the special drivers available from the I/O suppliers. In special cases refer to the I/ O manual, the Vishay application notes, or contact directly Vishay Sales, Marketing or Application.
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Document Number 84674 Rev. 1.2, 21-Feb-07
TFBS6712
Vishay Semiconductors Mode Switching
The TFBS6712 is in the SIR mode after power on as a default mode, therefore the FIR data transfer rate has to be set by a programming sequence using the TXD and SD inputs as described below. The low frequency mode covers speeds up to 115.2 kbit/s. Signals with higher data rates should be detected in the high frequency mode. Lower frequency data can also be received in the high frequency mode but with reduced sensitivity. To switch the transceivers from low frequency mode to the high frequency mode and vice versa, the programming sequences described below are required.
Setting to the Lower Bandwidth Mode (2.4 kbit/s to 115.2 kbit/s)
1. Set SD input to logic "HIGH". 2. Set TXD input to logic "LOW". Wait ts 200 ns. 3. Set SD to logic "LOW" (this negative edge latches state of TXD, which determines speed setting). 4. TXD must be held for th 200 ns. TXD is now enabled as normal TXDinput for the lower bandwidth mode.
Setting to the High Bandwidth Mode (0.576 Mbit/s to 4 Mbit/s)
1. Set SD input to logic "HIGH". 2. Set TXD input to logic "HIGH". Wait ts 200 ns. 3. Set SD to logic "LOW" (this negative edge latches state of TXD, which determines speed setting). 4. After waiting th 200 ns TXD can be set to logic "LOW". The hold time of TXD is limited by the maximum allowed pulse length. TXD is now enabled as normal TXD input for the high bandwidth mode.
SD
50 %
ts TXD 50 %
th High: FIR 50 % Low: SIR
14873
Figure 4. Mode Switching Timing Diagram
Truth table
Inputs SD high TXD x Optical input Irradiance [mW/m2] x RXD weakly pulled (500 k) high low active (echo) high high low (active) Outputs Transmitter 0
low low low low
high high > 80 s low low
x x <4 > Min. irradiance Ee in angular range < Max. irradiance Ee in angular range > Max. irradiance Ee in angular range
Ie 0 0 0
low
low
x
0
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TFBS6712
Vishay Semiconductors Recommended Solder Profiles
Solder Profile for Sn/Pb soldering Manual Soldering Manual soldering is the standard method for lab use. However, for a production process it cannot be recommended because the risk of damage is highly dependent on the experience of the operator. Nevertheless, we added a chapter to the above mentioned application note, describing manual soldering and desoldering. Storage The storage and drying processes for all VISHAY transceivers (TFDUxxxx and TFBSxxx) are equivalent to MSL4. The data for the drying procedure is given on labels on the packing and also in the application note "Taping, Labeling, Storage and Packing" (http://www.vishay.com/docs/82601/82601.pdf).
260 240 220 200 180
10 s max. at 230 C 240 C max.
2...4 C/s 160 C max.
Temperature/C
160 140 120 100 80 60 40 20 0 0 50 100 150 200 250 300 350
120 s...180 s
90 s max.
2...4 C/s
Time/s
19431
Figure 5. Recommended Solder Profile for Sn/Pb soldering
Lead (Pb)-Free, Recommended Solder Profile The TFBS6712 is a lead (Pb)-free transceiver and qualified for lead (Pb)-free processing. For lead (Pb)-free solder paste like Sn(3.0-4.0)Ag(0.5-0.9)Cu, there are two standard reflow profiles: Ramp-SoakSpike (RSS) and Ramp-To-Spike (RTS). The RampSoak-Spike profile was developed primarily for reflow ovens heated by infrared radiation. With widespread use of forced convection reflow ovens the Ramp-ToSpike profile is used increasingly. Shown below in figure 6 is VISHAY's recommended profiles for use with the TFBS6712 transceivers. For more details please refer to Application note: SMD Assembly Instruction. Wave Soldering For TFDUxxxx and TFBSxxxx transceiver devices wave soldering is not recommended.
280 260 240 220 200 180 Temperature/C 160 140 120 100 80 60 40 20 0 0
19261
T 255 C for 20 s max
T peak = 260 C max.
T 217 C for 50 s max
20 s
90 s...120 s
50 s max.
2 C...4 C/s
2 C...4 C/s
50
100
150 Time/s
200
250
300
350
Figure 6. Solder Profile, RSS Recommendation
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Document Number 84674 Rev. 1.2, 21-Feb-07
TFBS6712
Vishay Semiconductors TFBS4711, TFBS5711, TFBS6711, and TFBS6712 Package
(Mechanical Dimensions)
19612
Figure 7. Package drawing, tolerances: Height + 0.1, - 0.2 mm, otherwise 0.2 mm if not indicated
19728
19301
Soldering footprint: Side view Figure 8. Soldering footprints
Soldering footprint: Top view
Design Rules for Optical Windows For optical windows see the application note on the web http://www.vishay.com/docs/82506/82506.pdf.
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TFBS6712
Vishay Semiconductors
Drawing-No.: 9.800-5090.01-4 Issue: 1; 29.11.05
14017
Tape Width mm 16
A max. mm 330
N mm 50
W1 min. mm 16.4
W2 max. mm 22.4
W3 min. mm 15.9
W3 max. mm 19.4
Figure 9. Reel dimensions [mm]
19303
Drawing-No.: 9.700-5294.01-4 Issue: prel. copy; 24.11.04 Figure 10. Tape dimensions [mm] TFBS6712-TT3
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Document Number 84674 Rev. 1.2, 21-Feb-07
TFBS6712
Vishay Semiconductors
19304
Drawing-No.: 9.700-5295.01-4 Issue: prel. copy; 24.11.04 Figure 11. Tape dimensions [mm] TFBS6712-TR3
Document Number 84674 Rev. 1.2, 21-Feb-07
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TFBS6712
Vishay Semiconductors Ozone Depleting Substances Policy Statement
It is the policy of Vishay Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. Vishay Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively. Vishay Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use Vishay Semiconductors products for any unintended or unauthorized application, the buyer shall indemnify Vishay Semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
Document Number 84674 Rev. 1.2, 21-Feb-07
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Legal Disclaimer Notice
Vishay
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Vishay for any damages resulting from such improper use or sale.
Document Number: 91000 Revision: 08-Apr-05
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